This paper describes a modular design of a wrapper enabling BIST/BISR for small memories operating as
register files or FIFOs in high speed applications such as graphics and networking. The wrapper allows for atspeed test at low overhead and enables a simple repair scheme when millions of bits are used in such memories. The wrapper is intended to provide a standardized interface between memory and test controller, and thus work with any BIST controller, and communication between the two is minimized and at a reduced frequency.
Introduction and Motivation
Most published work on repairable memories has been confined to large individual instances (e.g. > 64kbits). Many applications, including graphics and networking, use large numbers of smaller memories, often configured as register files or FIFOs. These blocks are typically both small (very few words) and wide (many bits per word); common examples of these configurations range from 64 words of 64 bits to 128 words of 128 bits.
These memories are used for local “scratch storage”. It is generally impossible both physically and architecturally to combine them into a larger entity. Instead, they are located near the logic that uses them.
For example, an SoC might include dozens of parallel processing elements, each of which needs its own
register file. The memories operate at high speed, and cannot be tested at speed without a BIST wrapper
physically adjacent to them.
A simple wrapper interface allows multiple memories to share the same global controller, low communication overhead between them reduces design complexity, and a standardized wrapper design allows flexibility in choosing the vendor for the BIST as well as the global test methodology. With a 128x128 configuration, each instance contains 16kbits. With 150 such instances on a chip (not uncommon in 130nm and below), the total memory in these register files is over 3Mbit, well into the range where redundancy and repair are often recommended. A quick justification for the repair follows.
Sunday, November 21, 2010
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Enabling High Speed BIST and Repair For Memories
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